Links:
- XCircuit
a program for drawing publishable-quality electrical circuit schematic diagrams and related figures
hot
- EIDORS
Electrical Impedance Tomography and Diffusion based Optical Tomography Reconstruction Software
new
- Retro
a tool for designing synchronous hardware systems on the register-transfer level. The tool provides all essential building blocks, including simple AND/OR/NOT gates, registers, adders, multipliers, RAM, and ROM memory modules.
new
- ACS
a general purpose circuit simulator
- APLAC
(commercial) a nonlinear circuit, system, and electromagnetic FDTD simulation and design program.
- ASITIC
to design, analyze, and optimize planar and non-planar spiral inductor/transformer structures in Si. Also use it to analyze general magnetic and substrate coupling effects
- Bartels Autorouter
(commercial) supports gridless placement of pads, obstacles and traces, cell based routing grid, routing with one or multiple cells in width to existing ongrid or offgrid pads and ongrid or offgrid traces. The off-grid feature is a combination of grid-based and gridless routing technologies and does off-grid routing of traces even in a cell-based environment
- BitGen
a program for converting digital bitstreams to analog voltage sources suitable for circuit simulation in programs such as SPICE and Spectre
- BlueHDL
(commercial) provide VHDL and SystemC digital simulation capabilities
- brusey20
a tool which converts state diagrams into synthesizable VHDL
- BSVC
a Microprocessor Simulation Framework
hot
- Chipmunk
electronic circuit simulation and schematic capture, graphics editing, and curve plotting
- coderom
converts a list of codes (such as Gold codes, LFSR codes, Walsh codes, and Barker codes) into an S19 file which you can program into a ROM
- Comparescan
(commercial) a simulation comparison tool that compares a "golden" simulation to another simulation. With DAI Comparescan, you can perform complex timing, stability and functional checks on existing simulation data
- Crosstalk Analizer
detects crosstalk problems in submicronic circuits (chips). The analysis is based on the circuit layout, circuit specifications (which depend on the chip fabrication process), and on filters or parameters given by the user
- DigiTcl
a graphical user interface which allows users to construct and simulate simple digital circuits
- Dinotrace
a X-11 waveform viewer which understands Verilog Value Change Dumps, ASCII, and other trace formats. It allows placing cursors, highlighting signals, searching, printing, and other capabilities superior to may commercial waveform viewers
- DRS
(commercial) Derivational Reasoning System: a formal design environment for deriving verified hardware. It integrates a powerful derivation engine with existing verification and logic synthesis tools to provide a formal framework for correct-by-construction hardware design and synthesis
- EAGLE
(commercial) an easy to use, powerful and affordable schematic capture and printed circuit board design package
- Electric
a complete Electronic Design Automation (EDA) system that can handle many forms of circuit design
- Espresso
a program which performs logic simplification
- FAST
a Flexible Architecture Simulation Tool. FAST was designed as a framework for fast processor simulation. Its modular design allows for the easy addition of timing and statistics modules
- FreeHDL
a project to develop a free, open source, GPL'ed VHDL simulator for Linux
- gEDA
a GPLed toolset for doing electronic design
- gpsim
a full-featured software simulator for Microchip PIC microcontrollers distributed under the GNU General Public License
- Green Mountain VHDL Compiler
(commercial) a professional-level IEEE VHDL simulator based on direct compile technology provides fast simulation and advanced debugging features
- HADLOP
a simulation system for parallel digital optoelectronic and optical architectures. It was designed in order to verify the logical behavior of algorithms working on 2-dimensional data
planes
hot
- INSPIRE
a VHDL Simulation Environment with INcremental Analysis/Elaboration, SPecialized Functions, and Incremental Waveform REgeneration
- KLogic
an application for easy building and simulating digital circuit. It provides an easy way for building circuits containing standard components like AND, OR, XOR and flipflops like RS and JK. To build more complex and reuseable circuits, you can create sub circuits
- Koala Tools
(commercial) an easy to use GUI for mixed mode simulation visualization and manipulation. It can accept various SPICE simulation output formats
- LxScope
First oscilloscope for Linux: 100 MHz or 150 MHz Digital Oscilloscope
- magic
an enhancement to the venerable magic VLSI layout tool for use with OpenGL
- Magic
a popular integrated circuit layout tool in common use in universities and a number of industrial sites.
- MISTIC
Michigan Synthesis Tools for IC's: a planar process compiler for thin-film and micromachined devices
- MUCS-PCB
The University of Manchester Department of Computer Science PCB design software: consists of a textual design entry tool, a ViewLogic Viewdraw netlist interface, Gerber and Unix plot file plotting utils and three autorouters
- OCEAN
a comprehensive chip design package that includes a full set of powerful tools for the synthesis and verification of semi-custom sea-of-gates and gate-array chips
- p2m
a simple program that takes an image file and converts it to a layout suitable for placement on an integrated circuit chip
- PIC programmer
downloader software for Microchip PIC programmers. It is designed to work with any of the PC parallel port types of programers for the PIC16C84 processor
hot
- POLIS
centered around a single Finite State Machine-like representation
- SAVANT
an extensible, object-oriented intermediate form (IIR) for the hardware description language VHDL. The project produced a suite of software to analyze VHDL, build
the IIR, and output C++ suitable for execution with the TyVIS VHDL simulation kernel
- SEAMS
a mixed-signal simulator for models written in the VHDL-AMS language. This initial version implements about 90% of the full language
- SimpleScalar
consists of compiler, assembler, linker, simulation, and visualization tools for the SimpleScalar architecture. With this tool set, the user can simulate real programs on a range of modern processors and systems, using fast execution-driven simulation
- SIS
an interactive tool for synthesis and optimization of sequential circuits
- Slam
(commercial) a low cost mask layout editor
- slen
implements the Kronig-Penney method for the band-structure calculation of a semiconductor superlattice. It returns the miniband energies, the wave function, and wave function coefficients
- sls
a switch-level simulator that can be used to simulate the logical and timing behavior of digital MOS circuits
- SOS
a commercial design data management product built for hardware engineers
- SpeedSim/3
(commercial) a third-generation, high-performance implementation of a Cycle-based logic simulator. It offers a dramatic price advantage over specialized event-driven hardware accelerators and 10 to 100 times performance advantage over similarly-priced Event-driven software simulators
- Spice
Berkeley analog circuit simulator
- Spice Opus
a port of the SPICE 3f4 circuit simulator with added optimization utilities.
- spicepp
a preprocessor for berkeley spice3f5. It adds support for some structures commercial spices provide. Useful additions include .meas, .param, .lib, .globals, inline comments and equations
- SRecord
a collection of powerful tools for manipulating EPROM load files
- Super-FinSim
(commercial) a complete simulation environment for Verilog. It supports the entire Verilog language, user defined primitives, specify blocks, system tasks and functions, PLI 1.0, VCD and SDF
- Supermax EDA
(commercial) a wall to wall environment for electronic design. It consists of Supermax E-CAD, a PCB and MCM design environment combined with the full suite of EDA tools from Vewlogic, Mentor Graphics and Cadence for Schematic Design, VHDL Synthesis and Digital, Analog and Mixed Mode simulation
- SystemC
a modeling platform consisting of C++ class libraries and a simulation kernel for design at the system-, behaviroal- and register-transfer-levels. Designers create models using SystemC and standard ANSI C++
- TauSim
(commercial) a synchronous Verilog simulator with support for X and Z values. Release 3.0 optimizes RTL code, achieving high simulation speed on very large designs while preserving the rapid compilation of release 2.3. Gates and transistors are also optimized, with gate level designs simulating at speeds similar to RTL
- THUD
a register transfer level (RTL) simulation environment optimized for cycle-based designs
hot
- TkGate
an event driven digital circuit simulator with a tcl/tk-based graphical editor. TkGate supports a wide range of primitive circuit elements as well as user-defined modules for hierarchical
design
- TyVIS
a VHDL simulation kernel which has been implemented on top of WARPED, a general purpose Time Warp simulation kernel. This combination provides parallel VHDL simulation capability as WARPED allows sequential and parallel simulation
- UDL/I
Unified Design Language for Integrated Circuit: a Hardware Description Language (HDL) for logic synthesis
- Undertow
a commercial wave form display program for viewing digital and analog simulation output from a variety of tools, including Verilog, TIMEMILL, POWERMILL, HSpice, VHDL (VSS, LEAPFROG, MENTOR, and ModelTech) and Anagram
hot
- V2000
a Verilog-AMS (and VHDL) simulator system
- VBS
Verilog Behavioral Simulation: a simple implementation of a Verilog simulator
- VCD Waveform viewer
a tool for viewing vcd (value change dump) files under linux vcd files are often produced by verilog simulators
- VDT
VHDL Developer's Toolkit: developed to support fast and easy development and integration of VHDL application tools. It provides a library of versatile routines and several utilities for developers of VHDL application
- Ver
a portable, lightweight, structural Verilog Compiler
- VGUI
a free graphical tool for capturing, drawing, editing, and navigating hierarchical block-diagrams, and for producing corresponding structural VHDL code. The VGUI tool is easy to learn-and-use, with a style based on popular web-browser, word-processor/drawing tools
- ViPEC
a powerful tool for the analysis of high frequency, linear electrical networks. It takes a text based description of the electrical network and an analysis is performed in the frequency domain. The output is in the form of 2-port parameters (S, Y or Z) with results presented on a user defined grid and Smithchart
- VIS
Verification Interacting with Synthesis: a system for formal verification, synthesis, and simulation of finite state systems
- Voyeur
a visualization tool that displays a circuit schematic on the screen. It works in conjunction with external layout tools, including VCG, and Dot
- Xelen
for developing and simulating electrical sheets and creating layouts for printed circuits boards under
Unix, Windows or MacOS
- XPortShot RT
an oscilloscope simulator capable of displaying multiple data channels
- YA-EDA
intended to be one EDA solution for Linux (in early development)
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